000 00335nam a2200121Ia 4500
008 160710s2015 xx 000 0 und d
082 _a621.3815 PAL
100 _aPAL, VIJAY
245 _aIMPLEMENTATION OF UNIVERSAL ASYNCHOONOUS TRANSMITTER RECIEVER (UART) USING FPGA TECHNOLOGY
260 _b2006
300 _a69
942 _2ddc
_cTD
999 _c78348
_d78348