LOW POWER MULTI-VALUED ARITHMETIC LOGICAL UNIT DESIGN USING CNFETS

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TextPublication details: DELHI TECHNOLOGICAL UNIVERSITY 2019Description: 63Subject(s):

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Dissertation note: M.TECH 2019 MR. PIYUSH TEWARI

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Item type	Current library	Call number	Status	Date due	Barcode
Elec. Thesis & Dissertation	Delhi Technological University	621.382 MAH (Browse shelf(Opens below))	Not for loan		TD-4680

M.TECH 2019 MR. PIYUSH TEWARI

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